대한전자공학회논문지 (Journal of the Korean Institute of Telematics and Electronics)
- 제27권12호
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- Pages.1906-1915
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- 1990
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- 1016-135X(pISSN)
상위 수준 기술로부터 순차 회로의 자동 생성
FSM Synthesis from High-Level Descriptions
초록
A synthesis system generating sequential circuits from a high-level hardware descdription language CHDL, modelling language for Thor functional/behavioral simulator, is developed. In this paper, we describe the semantic analysis process, state minimization and state assignment algorithms. proposed assignment algorithm generates optimal state vectors using constraint matrix and similarity graph. Expremental results for MCNC benchmarks, standard test circuits, show that the system inplementing the proposed algorithms can be a viable tool for designing large finite state machines.
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