한국항해학회지 (Journal of the Korean Institute of Navigation)
- 제14권4호
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- Pages.31-39
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- 1990
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- 1225-0481(pISSN)
순환 알고리즘의 Processor Array에로의 합성 및 구현
The Synthesizing Implementation of Iterative Algorithms on Processor Arrays
초록
A systematic methodology for efficient implementation of processor arrays from regular iterative algorithms is proposed. One of the modern parallel processing array architectures is the Systolic arrays and we use it for processor arrays on this paper. On designing the systolic arrays, there are plenty of mapping functions which satisfy necessary conditions for its implementation to the time-space domain. In this paper, we sue a few conditions to reduce the total number of computable mapping functions efficiently. As a results of applying this methodology, efficient designs of systolic arrays could be done with considerable saving on design time and efforts.
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