대한전자공학회논문지 (Journal of the Korean Institute of Telematics and Electronics)
- 제23권6호
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- Pages.773-779
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- 1986
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- 1016-135X(pISSN)
수직 이중 확산형 MOSFET
A Vertical Double-Diffused MOSFET
- 김종오 (아주대학교 전자공학과) ;
- 최연익 (아주대학교 전자공학과) ;
- 손호태 (단국대학교 전기공학과) ;
- 성만영 (단국대학교 전기공학과)
- Kim, Jong-Oh (Dept. of Elec. Eng., Ajou Univ.) ;
- Choi, Yearn-Ik (Dept. of Elec. Eng., Ajou Univ.) ;
- Sohn, Ho-Tae (Dept. of Elec. Eng., Dankuk Univ.) ;
- Sung, Man-Young (Dept. of Elec. Eng., Dankuk Univ.)
- 발행 : 1986.06.01
초록
In this paper, we discuss fabrication and characteristics of the Vertical Double diffused MOS(VDMOS) transistor. The epi layers of starting wafers are 18~22\ulcorner in thickness and 8~12\ulcornercm in resistivity. The channel regions are defined through the self-aligned double diffusion process. The characteristics of the fabricated VDMOS are breakdown voltage of 240V, threshold voltage of 2V, on-resistance of 226\ulcornerand transconductance of 3x10**-3 mho.
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