집적회로 마스크 도면으로부터의 회로 추출

Circuit Extraction from MOS/LSI Mask Layout

This paper describes the CIREX(CIRcuit EXtractor), an automated CMOS circuit extraction program which provides SPICE2 input file by computing circuit connectivity and transistor dimensions from the CIF file. The CIREX also computes parasitic capacitance and resistance which makes it a valuable tool for timing analysis and detailed circuit simulation. A lattice model is used to calculate the interconnection resistances and substrate capacitances which can be replaced, as an option, by a node model for the worst case timing analysis of the circuit.