전기의세계
- 제30권10호
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- Pages.645-654
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- 1981
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- 1598-4613(pISSN)
유한요소법에 의한 V구JFET의 해석에 관한 연구
A study on the analysis of a vertical V-groove junction field effect transistor with finite element method
초록
A technique has been proposed for fabricating a submicron channel vertical V-groove JFET using standard photolithography. A finite element numerical simulation of the V-groove JFET operation was performed using a FORTRAN progrma run on a Cyber-174 computer. The numerical simulation predicts pentode like common source output characteristics for the p
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