Research on improving performance of phase locked loop algorithm

위상추종(Phase Locked Loop)알고리즘 성능개선을 위한 제어방법 연구

  • Lim, J.W. (Power electronics laboratory, Konkuk Univ.) ;
  • Cho, Y.H. (Power electronics laboratory, Konkuk Univ.) ;
  • Cheo, G.H. (Power electronics laboratory, Konkuk Univ.)
  • 임정우 (건국대학교 전기기계 및 전력전자연구실) ;
  • 조영훈 (건국대학교 전기기계 및 전력전자연구실) ;
  • 최규하 (건국대학교 전기기계 및 전력전자연구실)
  • Published : 2015.11.27

Abstract

This paper introduces general single PLL(Phase Locked Loop) algorithm and compares with proposed PLL method. The suggested PLL uses low pass filter to reduce high harmonics in real grid and uses feed forward method to compensate phase delay of the low pass filter.

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