Input Capacitance Analysis of Three-port Flyback Inverter with Active Power Decoupling Circuit

3권선형 능동 전력 디커플링 기법을 적용한 플라이백 인버터의 입력 커패시턴스 분석

In this paper, three-port flyback inverter with Active Power Decoupling(APD) circuit is analyzed. Conventional flyback inverter with passive power decoupling circuit needs the electrolytic capacitor with large capacitance for decoupling between constant DC power and instantaneous AC power. However the electrolytic capacitor has low lifespan about 50000 to 100000 hours. So the active power decoupling techniques are applied to reduce input capacitance of flyback inverter. Thus the overall system can achieve smaller size and longer lifespan. Proposed three-port flyback inverter is verified by design optimization, simulation and experimental result.