Proceedings of the Korean Vacuum Society Conference (한국진공학회:학술대회논문집)
- 2012.02a
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- Pages.431-432
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- 2012
Copper Interconnection and Flip Chip Packaging Laboratory Activity for Microelectronics Manufacturing Engineers
- Moon, Dae-Ho (Department of Electronic Engineering, Myongji University) ;
- Ha, Tae-Min (Department of Electronic Engineering, Myongji University) ;
- Kim, Boom-Soo (Department of Electronic Engineering, Myongji University) ;
- Han, Seung-Soo (Department of Information and Communication Engineering, Myongji University) ;
- Hong, Sang-Jeen (Department of Electronic Engineering, Myongji University)
- Published : 2012.02.08
Abstract
In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and