Low voltage operated top gated polymer thin film transistors with a high capacitance polymer dielectric

  • Jung, Soon-Won (Conv. Comp. and Mater. Research Laboratory, ETRI) ;
  • You, In-Kyu (Conv. Comp. and Mater. Research Laboratory, ETRI) ;
  • Noh, Yong-Young (Conv. Comp. and Mater. Research Laboratory, ETRI)
  • Published : 2009.10.12

Abstract

Low voltage operated top gated polymer transistors were fabricated with a high permittivity polymer, P(VDF-TrFE) and F8T2 as a gate dielectric and semiconducting layer, respectively. The operating voltage of transistors was effectively reduced under -10 V and typical threshold voltages were as low as -1 ~ -4 V with the reasonable charge carrier mobility of $10^{-3}cm^2$/Vs for the amorphous polymer. The large hysteresis in transfer curve was improved effectively by annealing at low temperature.

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