Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)
- 2009.07a
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- Pages.1529_1530
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- 2009
The formation of nano pillar arrays with p-type silicon using electrochemical etching
Electrochemical etching을 이용한 P형 실리콘에서의 nano pillar arrays 형성
- Ryu, Han-Hee (School of Electrical Engineering and Computer Science, Kyungpook National University) ;
- Kong, Seong-Ho (School of Electrical Engineering and Computer Science, Kyungpook National University) ;
- Kim, Jae-Hyun (Nano Applied Energy Device Laboratory, Daegu-Gyeongbuk Institute of Science and Technology(DGIST))
- Published : 2009.07.14
Abstract
The process conditions for fabricating p-type silicon pillars were optimized by controlling current density, bath temperature. To get best process flexibility for pillar arrays formation, three factors affecting pillar formation were changed. First, the solution bath was designed to keep constant temperature during the experiment irrespective of external temperature. Second, the counter Pt electrode was changed from rod type to mesh to obtain uniform distribution of current density. Third, Cr-Cu alloy electrode instead of Cu was used to increase electrode current density.
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