A Design Method on Power Sensefet to Protect High Voltage Power Device

고전압 전력소자를 보호하기 위한 센스펫 설계방법

  • Kyoung, Sin-Su (Semiconductor & CAD Lab., Dept. of Electrical Engineering, Korea University) ;
  • Seo, Jun-Ho (Semiconductor & CAD Lab., Dept. of Electrical Engineering, Korea University) ;
  • Kim, Yo-Han (Semiconductor & CAD Lab., Dept. of Electrical Engineering, Korea University) ;
  • Lee, Jong-Seok (Semiconductor & CAD Lab., Dept. of Electrical Engineering, Korea University) ;
  • Kang, Ey-Goo (Dept. of Information and telecommunication, Far East University) ;
  • Sung, Man-Young (Semiconductor & CAD Lab., Dept. of Electrical Engineering, Korea University)
  • 경신수 (고려대학교 전기공학과 반도체 및 CAD 연구실) ;
  • 서준호 (고려대학교 전기공학과 반도체 및 CAD 연구실) ;
  • 김요한 (고려대학교 전기공학과 반도체 및 CAD 연구실) ;
  • 이종석 (고려대학교 전기공학과 반도체 및 CAD 연구실) ;
  • 강이구 (극동대학교 컴퓨터정보통신표준학부) ;
  • 성만영 (고려대학교 전기공학과 반도체 및 CAD 연구실)
  • Published : 2008.06.19

Abstract

Current sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The sense FET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 450V power MOSFET devices by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration $1.5\times10^{14}cm^{-3}$, size of $600{\mu}m^2$ with 4.5 $\Omega$, and off-state leakage current below 50 ${\mu}A$. We offer the layout of the proposed sense FET to process actually. The offerd design and optimization methods is meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.

Keywords