Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)
- 2006.11a
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- Pages.376-377
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- 2006
Dishing Reduction on Polysilicon CMP for MEMS Application
MEMS 적용을 위한 폴리실리콘 CMP에서 디싱 감소에 대한 연구
- Park, Sung-Min (Department of precision & Mechanical Engineering in PNU) ;
- Jeong, Hae-Do (School of Mechanical Engineering in PNU)
- Published : 2006.11.09
Abstract
Chemical Mechanical Planarization (CMP) has emerged as an enabling technology for the manufacturing of multi-level metal interconnects used in high-density Integrated Circuits (IC). Recently, multi-level structures have been also widely used m the MEMS device such as micro engines, pressure sensors, micromechanical fluid pumps, micro mirrors and micro lenses. Especially, among the thin films available in IC technologies, polysilicon has probably found the widest range of uses in silicon technology based MEMS. This paper presents the characteristic of polysilicon CMP for multi-level MEMS structures. Two-step CMP process verifies that is possible to decrease dishing amount with two type of slurries characteristics. This approach is attractive because two-step CMP process can be decreased dishing amount considerably more then just one CMP process.