Efficient Hardware Design of SPIHT Algorithm for Image Compression

영상압축을 위한 SPIHT 알고리즘의 효율적인 하드웨어 설계

  • Yu Mong (Dept. of Electronic Engineering, Kyung-Hee University) ;
  • Song Moonbin (Dept. of Electronic Engineering, Kyung-Hee University) ;
  • Chung Yunmo (Dept. of Electronic Engineering, Kyung-Hee University)
  • 유몽 (경희대학교 전자공학과) ;
  • 송문빈 (경희대학교 전자공학과) ;
  • 정연모 (경희대학교 전자공학과)
  • Published : 2004.11.01

Abstract

This paper proposes an efficient hardware implementation of SPIHT(Set Partitoning In Hierarchical Tree) algorithm for image compression with the discrete wavelet transform. An efficient technique to scan the coefficients which are located in partitioned spatial orientation trees by DWT is considered in terms of counter fields for sorting pass and refinement pass. The proposed image compression method using SPIHT has been modeled in VHDL and has been implemented by use of both TMS320C6000 as a DSP and Virtex2 as a Xilinx FPGA.

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