Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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SMART7F: VARIABLE PIPELINE STAGE FOR 32-BIT MICROCONTROLLER

내장형 32비트 마이크로콘트롤러에 적합한 VARIABLE PIPELINE STAGE 설계

  • Cheong Young-Seok (Dept. of Electrical Electronics Eng.. Yonsei University) ;
  • Yang Dong-Hun (Dept. of Electrical Electronics Eng.. Yonsei University) ;
  • Kwak Seung-Ho (Dept. of Electrical Electronics Eng.. Yonsei University) ;
  • Lee Moon-Key (Dept. of Electrical Electronics Eng.. Yonsei University)
  • 정영석 (연세대학교 전기전자공학과) ;
  • 양동훈 (연세대학교 전기전자공학과) ;
  • 곽승호 (연세대학교 전기전자공학과) ;
  • 이문기 (연세대학교 전기전자공학과)
  • Published : 2004.06.01
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Abstract

In this paper. the soft IP (Intellectual Property) of pipeline of 32-bit microcontroller for embedded and portable application is presented. This IP supports variable pipeline stage according to the performance that user wants. In this architecture, three pipeline stages are basically employed and extended to the five pipeline stages. To this purpose, control logic has been partitioned to reflect each pipeline stage. FPGA platform is used for rapidly prototyping the IP. This is designed using Verilog HDL

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