High Performance TFTs Fabricated Inside a Location-Controlled Grain by Czochralski (grain-filter) Process

  • Rana, Vikas (Delft Institute of Microelectronics and Submicrontechnology (DIMES) Delft Univ. of Technol.) ;
  • Ishihara, Ryoichi (Delft Institute of Microelectronics and Submicrontechnology (DIMES) Delft Univ. of Technol.) ;
  • Metselaar, J.W. (Delft Institute of Microelectronics and Submicrontechnology (DIMES) Delft Univ. of Technol.) ;
  • Beenakker, C.I.M. (Delft Institute of Microelectronics and Submicrontechnology (DIMES) Delft Univ. of Technol.) ;
  • Hiroshima, Yasushi (Technology Platform Research Center, Seiko-Epson Corp.) ;
  • Abe, Daisuke (Technology Platform Research Center, Seiko-Epson Corp.) ;
  • Higashi, Seiichiro (Technology Platform Research Center, Seiko-Epson Corp.) ;
  • Inoue, Satoshi (Technology Platform Research Center, Seiko-Epson Corp.) ;
  • Shimoda, Tatsuya (Technology Platform Research Center, Seiko-Epson Corp.)
  • 발행 : 2003.07.09

초록

This paper reports the characteristics of TFTs, formed inside a location-controlled grain: "single-crystalline" Si TFTs (c-Si TFTs). Position of the grains were controlled with a great precision by "${\mu}-Czochralski$ (grain-filter) process". Effects of process parameters, such as, deposition method of gate $SiO_2$, crystallization energy density and position of the channel with respect to the grain filters on TFT characteristics is investigated. It is concluded that the characteristics of TFTs drastically improved by avoiding the grain filter from the channel region. With TFTs having the current-flow direction parallel to radial direction from the grain-filter, electron mobility and subthreshold swing of 600 $cm^2/Vs$ and 0.21 V/dec. respectively are obtained.

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