Proceedings of the Korean Society Of Semiconductor Equipment Technology (한국반도체및디스플레이장비학회:학술대회논문집)
- 2003.12a
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- Pages.154-159
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- 2003
A Dual-Level Knowledge-Based Synthesis System for Semiconductor Chip Encapsulation
Abstract
Semiconductor chip encapsulation process is employed to protect the chip and to achieve optimal performance of the chip. Expert decision-making to obtain the appropriate package design or process conditions with high yields and high productivity is quite difficult. In this paper, an expert system for semiconductor chip encapsulation has been constructed which combines a knowledge-based system with CAE software.
Keywords