BIST Design for Hazard controller in Pipeline System

Pipeline 시스템의 Hazard 검출기를 위한 BIST 설계

  • 이한권 (울산대학교 컴퓨터정보통신공학부) ;
  • 이현룡 (울산대학교 컴퓨터정보통신공학부) ;
  • 장종권 (울산대학교 컴퓨터정보통신공학부)
  • Published : 2003.11.01

Abstract

The recent technology developments introduce new difficulties into the test process by the increased complexity of the chip. Most widely used method for testing high complexity and embedded systems is built-in self-test(BIST). In this paper, we describe 5-stage pipeline system as circuit under testing(CUT) and proposed a BIST scheme for the hazard detection unit of the pipeline system. The proposed BIST scheme can generate sequential instruction sets by pseudo-random pattern generator that can detect all hazard issues and compare the expected hazard signals with those of the pipelined system. Although BIST schemes require additional area in the system, it proves to provide a low-cost test solution and significantly reduce the test time.

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