Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2003.07b
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- Pages.827-830
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- 2003
Design of Audio Sampling Rate Conversion Block
Audio Sampling Rate Conversion Block의 설계
Abstract
This paper proposes an area-efficient FIR filter architecture for sampling rate conversion of hi-fi audio data. Sampling rate conversion(SRC) block converts audio data sampled at 96KHz down to 48KHz sampled data and vice versa. 63-tap FIR filter coefficients have been synthesized that gives 100dB stop band attenuation and 5.2KHz transition bandwidth. Time-shared filter architecture requires only one multiplier and accumulator for 63-tap filter operation. This results in huge hardware saving of up to 10~19 times smaller compared with traditional FIR structure.
Keywords