대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2003년도 하계종합학술대회 논문집 I
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- Pages.374-377
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- 2003
버퍼를 장착한 a$\times$ b 스위치로 구성된 Fat-tree 망의 성능분석
Analytical modeling of a Fat-tree Network with buffered a$\times$ b switches
초록
In this paper, a performance evaluation model of the Fat-Tree network with the multiple-buffered crossbar switches is proposed and examined. Buffered switch technique is well known to solve the data collision problem in the switch network The proposed evaluation model is developed by investigating the transfer patterns of data packets in a switch with output-buffers. Steady state probability concept is used to simplify the analyzing processes. Two important parameters of the network performance, throughput and delay, are then evaluated. To validate the proposed analysis model, the simulation is carried out on the various sizes of Fat-tree networks that use the multiple a
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