Wafer Fail Pattern Classification Simulation

웨이퍼 오류 패턴 인식 시뮬레이션

  • 김상진 (성균관대학교 정보통신공학부 컴퓨터공학과) ;
  • 한영신 (성균관대학교 정보통신공학부 컴퓨터공학과) ;
  • 이칠기 (성균관대학교 정보통신공학부 컴퓨터공학과)
  • Published : 2003.06.01

Abstract

Semiconductor Manufacturing has emerged as one of the most Important world industries. Even with the highly automated and precisely monitored facilities used to process the complex manufacturing steps in a near particle free environment, processing variations in wafer fabrication still exist. The causes of these variations may arise from equipment malfunctions, delicate and difficult processing steps, or human mistakes. In this paper, we could specify the cause stage and the cause equipment and take countermeasures at a speed by the conventional method, without depending on the experience and skills of the engineer

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