Design of the CMOS Low-Voltage Regulation Circuit

CMOS 소자를 이용한 저전압 안정화 회로 설계

  • 김영민 (담양대학 컴퓨터응용전기시스템과) ;
  • 이근호 (담양대학 컴퓨터응용전기시스템과) ;
  • 황종선 (담양대학 컴퓨터응용전기시스템과) ;
  • 김종만 (담양대학 컴퓨터응용전기시스템과) ;
  • 박현철 (담양대학 컴퓨터응용전기시스템과)
  • Published : 2002.05.17

Abstract

A CMOS voltage regulation circuit for use at low-voltage is proposed. Circuits for a positive and for a negative current regulation are presented and are designed with commercial CMOS technology. The voltage regulation that is stable over ambient temperature variations is an important component of most data acquisition systems. These results are verified by the H-SPICE simulation $0.8{\mu}m$ parameter. As the result, the temperature dependency of output voltage is $0.57mV/^{\circ}C$ and the power dissipation is 1.8 mV on 5V supply voltage.

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