Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2002.07b
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- Pages.1300-1303
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- 2002
Distribution of Critical Path Delays in a Combinatorial Circuit
- Yanagi, Daigo (Dept. of EECE, Chuo University) ;
- Tsukiyama, Shuji (Dept. of EECE, Chuo University)
- Published : 2002.07.01
Abstract
In this paper, we consider how to treat delay-time uncertainties caused by inter-die and intradie variabilities in evaluating the distribution of the critical delay of a CMOS combinatorial circuit, and formulate inter-die variability as a correlation of delays. Then, we propose an algorithm to evaluate the distribution of the critical delay based on the algorithm in [1] which takes correlations into account. We also show some experimental results to see the effect of the formulation.
Keywords