Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2002.06b
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- Pages.349-352
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- 2002
Design of 32 bits tow Power Smart Card IC
32 비트 저전력 스마트카드 IC 설계
Abstract
In this Paper, we introduced 32 bit SOC implementation for multi-application Smart Card and described the methodology for reducing power consumption. It consists of ARMTTDMI micro-processor, 192 KBytes EEPROM, 16 KB SRAM, crypto processors and card reader interface based on AMBA bus system. We used Synopsys Power Compiler to estimate and optimize power consumption. Experimental results show that we can reduce Power consumption up to 62 % without increasing the chip area.
Keywords