Design of 32 bits tow Power Smart Card IC

32 비트 저전력 스마트카드 IC 설계

  • 김승철 (한국전자통신연구원 반도체 원천기술연구소) ;
  • 김원종 (한국전자통신연구원 반도체 원천기술연구소) ;
  • 조한진 (한국전자통신연구원 반도체 원천기술연구소) ;
  • 정교일 (한국전자통신연구원 정보보호연구본부)
  • Published : 2002.06.01

Abstract

In this Paper, we introduced 32 bit SOC implementation for multi-application Smart Card and described the methodology for reducing power consumption. It consists of ARMTTDMI micro-processor, 192 KBytes EEPROM, 16 KB SRAM, crypto processors and card reader interface based on AMBA bus system. We used Synopsys Power Compiler to estimate and optimize power consumption. Experimental results show that we can reduce Power consumption up to 62 % without increasing the chip area.

Keywords