Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2002.06b
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- Pages.157-160
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- 2002
Design methodology of digital circuits for an audio-signal-processing DAC
오디오 신호처리용 DAC디지털 단의 설계기법
Abstract
This paper proposed a guideline for selecting the arithmetic circuit architecture. The guideline incorpo-rates the new concept of PDSP (power-delay-size product) and the weighting method. HSPICE simulations havc been performed to several full adders in order to prove the validity of the proposed guideline. We applied this guideline to select an optimized FA (full adder) architecture and successfully implemented the DAC's digital blocks.
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