An Optimized Hybrid Radix MAC Design

최적화된 4진/8진 혼합 MAC 설계

  • 정진우 (연세대학교 전기전자공학과) ;
  • 김승철 (연세대학교 전기전자공학과) ;
  • 이용주 (연세대학교 전기전자공학과) ;
  • 이용석 (연세대학교 전기전자공학과)
  • Published : 2002.06.01

Abstract

This paper is about a high-speed MAC (multiplier and accumulator) design applying radix-4 and radix-8 Booth's algorithm at the same time. The optimized hybrid radix design for high speed MAC has taken advantage of both a radix-4 and a radix-8 architectures. A radix-4 architecture meets high-speed, but it takes much more power and chip area than a radix-8 architecture. A radix-8 architecture needs less power and chip area than the other, but it has a bottleneck of generating three times the multiplicand problem. An optimized hybrid architecture performs tile radix-4 multiplication partially in parallel with the generation of three times the multiplicand for use of tile radix-8 multiplication. It reduces the concerned bit width of multiplier in radix-8 multiplication.

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