Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2001.06c
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- Pages.157-160
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- 2001
VLSI Implementation of Adaptive mutation rate Genetic Algorithm Processor
자가적응 유전자 알고리즘 프로세서의 VLSI 구현
Abstract
This paper has been studied a Adaptive Mutation rate Genetic Algorithm Processor. Genetic Algorithm(GA) has some control parameters such as the probability of bit mutation or the probability of crossover. These value give a priori by the designer There exists a wide variety of values for for control parameters and it is difficult to find the best choice of these values in order to optimize the behavior of a particular GA. We proposed a Adaptive mutation rate GA within a steady-state genetic algorithm in order to provide a self-adapting mutation mechanism. In this paper, the proposed a adaptive mutation rate GAP is implemented on the FPGA board with a APEX EP20K600EBC652-3 devices. The proposed a adaptive mutation rate GAP increased the speed of finding optimal solution by about 10%, and increased probability of finding the optimal solution more than the conventional GAP
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