대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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- Pages.281-284
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- 2001
Harmonic Locking을 제거하기 위한 아날로그 Multi- phase DLL 설계
An Analog Multi-phase DLL for Harmonic Lock Free
초록
This paper describes an analog multi-phase delay-locked loop (DLL) to solve the harmonic lock problem using current-starved inverter and shunt-capacitor delay cell. The DLL can be used not only as an internal clock buffer of microprocessors and memory It's but also as a multi-phase clock generator for gigabit serial interfaces. The proposed circuit was simulated in a 0.25
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