Taylor′s Series Model Analysis of Maximum Simultaneous Switching Noise for Ground Interconnection Networks in CMOS Systems

CMOS그라운드 연결망에서 발생하는 최대 동시 스위칭 잡음의 테일러 급수 모형의 분석

This paper presents an efficient method to estimate the maximum SSN (simultaneous switching noise) for ground interconnection networks in CMOS systems using Taylor's series and analyzes the truncation error that has occurred in Taylor's series approximation. We assume that the curve form of noise voltage on ground interconnection networks is linear and derive a polynomial expression to estimate the maximum value of SSN using $\alpha$-power MOS model. The maximum relative error due to the truncation is shown to be under 1.87% through simulations when we approximate the noise expression in the 3rd-order polynomial.