대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2001년도 하계종합학술대회 논문집(1)
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- Pages.163-166
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- 2001
640Gb/s ATM 스위칭 시스템의 Throughput 향상을 위한 Self-Load Balancing 메커니즘 연구
A Study on Self-Load Balancing Mechanism for Improvement of Throughput in 640Gb/s ATM Switching system
- Jang, Suk-Gi (Dept. of Electronics Eng., Graduate School of Chosun Univ.) ;
- Kim, Tae-Young (Dept. of Electronics Eng., Graduate School of Chosun Univ.) ;
- Kim, Hoon (Dept. of Electronics Eng., Graduate School of Chosun Univ.) ;
- Park, Kwang-Chae (School of Electronics, Information and Communication Eng., Chosun Univ.)
- 발행 : 2001.06.01
초록
Software controlled traffic management becomes more difficult with increasing switch size, because a huge number of connections are multiplexed in a high speed switching system and each ATM connections does not have a fixed bandwidth It is based on high-speed WDM(wavelength division multiplexed) links that can multiplex a huge number of connections on a statistical basis, and a self-load balancing technique. the Proposed switching system is scalable, and achieves the non-blocking capability without the use of complicated software control, using instead a hardware self-load balancing mechanism
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