Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

A Study on Self-Load Balancing Mechanism for Improvement of Throughput in 640Gb/s ATM Switching system

640Gb/s ATM 스위칭 시스템의 Throughput 향상을 위한 Self-Load Balancing 메커니즘 연구

  • Jang, Suk-Gi (Dept. of Electronics Eng., Graduate School of Chosun Univ.) ;
  • Kim, Tae-Young (Dept. of Electronics Eng., Graduate School of Chosun Univ.) ;
  • Kim, Hoon (Dept. of Electronics Eng., Graduate School of Chosun Univ.) ;
  • Park, Kwang-Chae (School of Electronics, Information and Communication Eng., Chosun Univ.)
  • 장석기 (조선대학교 일반대학원 전자공학과) ;
  • 김태영 (조선대학교 일반대학원 전자공학과) ;
  • 김훈 (조선대학교 일반대학원 전자공학과) ;
  • 박광채 (조선대학교 전자정보통신공학부)
  • Published : 2001.06.01
Download PDF
⟨ Previous Next ⟩

Abstract

Software controlled traffic management becomes more difficult with increasing switch size, because a huge number of connections are multiplexed in a high speed switching system and each ATM connections does not have a fixed bandwidth It is based on high-speed WDM(wavelength division multiplexed) links that can multiplex a huge number of connections on a statistical basis, and a self-load balancing technique. the Proposed switching system is scalable, and achieves the non-blocking capability without the use of complicated software control, using instead a hardware self-load balancing mechanism

Keywords