Design of Carrier Recovery Loop in DPLL Structure for QPSK Demodulator Satellite Broadcasting

위성방송용 QPSK 복조기를 위한 DPLL구조의 Carrier Recovery Loop 설계

In this W the complexity of implementation is reduced by the reduction into half of the number of the multiplier in filter structure of the conventional carrier recovery loop, and as the drawback of NCO of the conventional carrier recovery loop wastes a amount of power for the structure of lookup table, We designed the structure of combinational logic without the lookup table. In the comparison with dynamic power of the proposed NCO, the power of NCO with the lookup table is 175${\mu}$W, NCO with the proposed of structure is 24,65${\mu}$W. As if result, it is recognized that about one eight of loss power is reduced In the simulation of carrier recovery loop designed QPSK demodulator, it is known that the carrier phase is compensated.