Proceedings of the KIPE Conference (전력전자학회:학술대회논문집)
- 2001.10a
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- Pages.151-154
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- 2001
Design of Deadbeat DSP Controlled PWM Inverter With Two-Level Switching Pattern
- Choi Seong-Kwan (SoongSil University) ;
- Park Hae-Won (SoongSil University) ;
- Kim Soon-Young (ChungJu Nat. Univ.) ;
- Seok Won-Yeob (InChon Polytechnic College) ;
- Jeon Hee-Jong (SoongSil University)
- Published : 2001.10.01
Abstract
In this paper, a two-level switching algorithm of the deadbeat to control PWM inverter is proposed. A modified algorithm of the deadbeat is suitable for the UPS system. Two levels in the pulse pattern are used. This scheme allows the use of higher switching frequency for a given computation time delay, which results in lower total harmonic distortion at the output. The proposed control scheme is implemented using TMS320F240 DSP chip for controlling on inverter.
Keywords