Design of Deadbeat DSP Controlled PWM Inverter With Two-Level Switching Pattern

  • 발행 : 2001.10.01

초록

In this paper, a two-level switching algorithm of the deadbeat to control PWM inverter is proposed. A modified algorithm of the deadbeat is suitable for the UPS system. Two levels in the pulse pattern are used. This scheme allows the use of higher switching frequency for a given computation time delay, which results in lower total harmonic distortion at the output. The proposed control scheme is implemented using TMS320F240 DSP chip for controlling on inverter.

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