Proceedings of the Acoustical Society of Korea Conference (한국음향학회:학술대회논문집)

The Acoustical Society of Korea (한국음향학회)
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A time-shared multiplier designed for the ASIC implementation of multi-channel audio equalizer

다 채널 오디오 이퀄라이저의 ASIC구현을 위한 시분할 공유 곱셈기 구조에 관한 연구

  • Kim Chong-Yun (School of Electronics and Electrical Engineering, Chung-Ang University, Electronics and Telecommunications Research Institute) ;
  • Lee Jae-Sik (School of Electronics and Electrical Engineering, Chung-Ang University, Electronics and Telecommunications Research Institute) ;
  • Kim Jae-Hwa (School of Electronics and Electrical Engineering, Chung-Ang University, Electronics and Telecommunications Research Institute) ;
  • Chang Tae-Gyu (School of Electronics and Electrical Engineering, Chung-Ang University, Electronics and Telecommunications Research Institute)
  • 김종윤 (중앙대학교 전자전기공학부) ;
  • 이재식 (중앙대학교 전자전기공학부) ;
  • 김재화 (중앙대학교 전자전기공학부) ;
  • 장태규 (중앙대학교 전자전기공학부)
  • Published : 2000.07.07
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Abstract

This paper presents a filter bank designed for the multi-channel audio equalizer. A time-shared multiplier is also proposed to implement the equalizer with a minimum number of gates when it is synthesized with ASIC or FPGA. Further reduction of the number of required gates is achieved by designing the multiplier based on a cascaded sequential circuit utilizing partial multiplications. The equalizer is realized with FPGA and its real-time operation verifies the reliability and high fidelity of the designed system.

Keywords