융합신호처리학회 학술대회논문집 (Proceedings of the Korea Institute of Convergence Signal Processing)
- 한국신호처리시스템학회 2000년도 하계종합학술대회논문집
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- Pages.341-344
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- 2000
VHDL을 이용한 0-1 Knapsack 프로세서의 설계
Design of the 0-1 Knapsack Processor using VHDL
초록
The 0-1 knapsack processor performing dynamic programming is designed and implemented on a programmable logic device. Three types of a processor, each with different behavioral models, are presented, and the operation of a processor of each type is verified with an instance of the 0-1 knapsack problem.
키워드