Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design of Fast Search Algorithm for The Motion Estimation using VHDL

VHDL을 이용한 고속 움직임 예측기 설계

  • 김진연 (호서대학교 전기공학부) ;
  • 박노경 (호서대학교 전기공학부) ;
  • 진현준 (호서대학교 전기공학부) ;
  • 윤의중 (호서대학교 전기공학부) ;
  • 박상봉 (세명대학교 정보통신공학과)
  • Published : 2000.11.01
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Abstract

Motion estimation technique has been used to increase video compression rates in motion video applications. One of the important algorithms to implement the motion estimation technique is search algorithm. Among many search algorithms, the H.263 adopted the Nearest Neighbors algorithm for fast search. In this paper, motion estimation block for the Nearest Neighbors algorithm is designed on FPGA and coded using VHDL and simulated under the Xilinx foundation environments. In the experiment results, we verified that the algorithm was properly designed and performed on the Xilinx FPGA(XCV300Q240)

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