Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2000.11d
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- Pages.183-186
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- 2000
Design of Fast Search Algorithm for The Motion Estimation using VHDL
VHDL을 이용한 고속 움직임 예측기 설계
Abstract
Motion estimation technique has been used to increase video compression rates in motion video applications. One of the important algorithms to implement the motion estimation technique is search algorithm. Among many search algorithms, the H.263 adopted the Nearest Neighbors algorithm for fast search. In this paper, motion estimation block for the Nearest Neighbors algorithm is designed on FPGA and coded using VHDL and simulated under the Xilinx foundation environments. In the experiment results, we verified that the algorithm was properly designed and performed on the Xilinx FPGA(XCV300Q240)
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