Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2000.11b
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- Pages.357-360
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- 2000
32-bit MAC Architecture of a RISC Processor for Portable Terminals
휴대단말용 RISC 프로세서의 32비트 MAC 구조
Abstract
In this paper, we designed 32-Hit MAC architecture of a RISC Processor for portable terminals such as cellular telephones, personal digital assistants, notebooks, etc. In order to have minimum area with best performance, the MAC performs 32 by 8 multiplication per cycle, with early termination circuit that enables multiply cycles depend on the value of multiplier. It uses the sign bit of a partial product and two extra bits for sign extension, The MAC is modeled and simulated in RTL using VHDL. The MAC is synthesized using IDEC C-631 Cell library based on 0.6
Keywords