대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2000년도 ITC-CSCC -2
- /
- Pages.1119-1122
- /
- 2000
RE circuit simulation for high-power LDMOS modules
- fujioka, Tooru (Semiconductor & Integrated Circuits Hitachi, Ltd.) ;
- Matsunaga, Yoshikuni (Semiconductor & Integrated Circuits Hitachi, Ltd.) ;
- Morikawa, Masatoshi (Semiconductor & Integrated Circuits Hitachi, Ltd.) ;
- Yoshida, Isao (Semiconductor & Integrated Circuits Hitachi, Ltd.)
- 발행 : 2000.07.01
초록
This paper describes on RF circuit simulation technique, especially on a RF modeling and a model extraction of a LDMOS(Lateral Diffused MOS) that has gate-width (Wg) dependence. Small-signal model parameters of the LDMOSs with various gate-widths extracted from S-parameter data are applied to make the relation between the RF performances and gate-width. It is proved that a source inductance (Ls) was not applicable to scaling rules. These extracted small-signal model parameters are also utilized to remove extrinsic elements in an extraction of a large-signal model (using HP Root MOSFET Model). Therefore, we can omit an additional measurement to extract extrinsic elements. When the large-signal model with Ls having the above gate-width dependence is applied to a high-power LDMOS module, the simulated performances (Output power, etc.) are in a good agreement with experimental results. It is proved that our extracted model and RF circuit simulation have a good accuracy.
키워드