Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2000.06b
- /
- Pages.238-241
- /
- 2000
Design of a High-speed Decision Feedback Equalizer ASIC chip using the Constant-Modulus Algorithm
CMA 알고리즘을 이용한 고속 DFE 등화기의 ASIC 칩 설계
Abstract
This paper describes an equalizer using the DFE (Decision Feedback Equalizer) structure, CMA. (Constant Modulus Algorithm) and LMS (Least Mean Square) algorithms. We employ high speed multipliers, square logics and many CSAs (Carry Save Adder) for high speed operations. We have developed floating-point models and fixed-point models using the COSSAP
Keywords