Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2000.06b
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- Pages.205-208
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- 2000
A Low Voltage Analog Four-quadrant Multiplier
저전압 아날로그 4상한 멀티플라이어
Abstract
In this paper, a low voltage CMOS analog four-quadrant multiplier using two V-I converters is presented. The proposed V-I converter is composed of the series composite transistor and the low voltage composite transistor. The designed analog four-quadrant multiplier has simulated by HSPICE using 0.25
Keywords