A Study on the Behavior of Floating-Point Unit Conforming the ANSI/IEEE Std. 754-1985

ANSI/IEEE Std. 754-1985에 의거한 부동소수점 연산기의 동작원리에 관한 연구

  • 김광욱 (중앙대학교 제어계측학과) ;
  • 정태상 (중앙대학교 전자전기공학부)
  • Published : 1999.11.20

Abstract

A software implementation of floating-point addition and multiplication is presented. For this, the ANSI/IEEE standard for binary floating-point arithmetic is reviewed briefly. The architecture and behavior of the $Intel^{(R)}\;80{\times}87$ FPU is fully studied and basic algorithms for floating-point addition and multiplication are used for the implementation. Some examples and their verifications are also presented.

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