Design of a Coefficient-Loadable 128-Tap FIR Filter

계수 초기화 방식의 128-Tap FIR필터 설계

  • Published : 1999.11.01

Abstract

We designed a 128-tap FIR filter for a modem which complies with ITU-T V.32. We adopted pipeline technique and realized delay-taps with two ring-buffers. The multiplier in this filter carries out 2's complement fixed-point multiplication of 14bit $\times$ 16bit. The designed filter is expected to operate at 50MHz.

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