Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 1999.11a
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- Pages.408-411
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- 1999
Microarchitecture Simulator for On-Chip Multiprocessor Microprocessor
다중처리형 마이크로프로세서 미세구조 시뮬레이터
- Park, Kyoung (Computer System Department, ETRI) ;
- Hahn, Woo-Jong (Computer System Department, ETRI)
- Published : 1999.11.01
Abstract
Microarchitecture simulator is an important tool to verify and optimize the microarchitecture of a new microprocessor. Moreover. it can be use as a performance simulator to estimate the target microprocessor′s performance. And system software designers can use it as a software developing environment. This paper describes a "microarchitecture simulator for on-chip Multiprocessor microprocessor". It is a program-driven and cycle-based simulator that can execute simultaneous mutithreading benchmarks. We verified the microarchitecture of a new on-chip multiprocessor microprocessor with it and did performance simulations to estimate the performance of the on-chip multiprocessor microprocessor.
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