Efficient Co-simulation Method with Dynamic Selection of Processor Mode1

동적인 프로세서 모델 선택에 의한 효율적인 코시뮬레이션 방법

  • 고현우 (한양대학교 CAD 및 통신회로 연구실) ;
  • 배종열 (한양대학교 CAD 및 통신회로 연구실) ;
  • 정정화 (한양대학교 CAD 및 통신회로 연구실)
  • Published : 1999.11.01

Abstract

In this paper, the efficient HW/SW co-simulation method which selects the ISA model dynamically is proposed. Because the ISA models with only fixed accuracy have been used in previous co-simulation environment, it may result in bad performance in speed or accuracy. In the proposed method, the cycle accurate ISA model is used in the case that the states of the detailed system are to be inspected. In other case, instruction-based model is executed in order to accelerate the simulation speed. The proposed dynamic model selection can be done by setting the conversion point in the application code before the simulation starts. The experiment on the embedded RISC processor have been performed, and its result shows that the proposed method is more efficient than the case of using fixed ISA model.

Keywords