Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 1999.11a
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- Pages.232-235
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- 1999
Development of a Floating Point Co-Processor for ARM Processor
ARM 프로세서용 부동 소수점 보조 프로세서 개발
Abstract
In this paper, we present a coprocessor that can operate with ARM microprocessors. The coprocessor supports IEEE 754 standard single- and double-precision binary floating point arithmetic operations. The design objective is to achieve minimum-area, low-power and acceleration of processing power of ARM microprocessors. The instruction set is compatible with ARM7500FE. The coprocessor is written in verilog HDL and synthesized by the SYNOPSYS Design Compiler. The gate count is 38,115 and critical path delay is 9.52ns.
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