대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 1999년도 추계종합학술대회 논문집
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- Pages.220-223
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- 1999
VHDL을 이용한 개선된 Isolated 2중 DES의 설계 및 구현
Design and Implementation of Modified Isolated Double DES Using VHDL
초록
Conventional double DES has been not only shown to have a vulnerable drawback to attack method called 'Meet-in-the-Middle', but also to be hard to use that it is because software implementation has a number of problem in real time processing. This paper describes the design and implementation of modified Isolated double DES algorithm using VHDL for resolving the above problems. In this approach, we also discuss an efficient method for increasing cipher strength through expansion of key length.
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