VLSI Design of MPEG-2 AAC Decoder

VLSI를 이용한 MPEG-2 AAC 복호화기 설계

This paper presents a real-time MPEG-2 AAC decoding system, which can decode 2-channel main profile MPEG-2 AAC bitstream. The proposed system supports all decoding tools except for coupling channel tool, and provides sampling rates of 32, 44.1, 48 KHz. The system consists of a simple programmable DSP core and two hardwired logic modules that perform Huffman decoding and prediction for real-time implementation.