Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 1999.06a
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- Pages.974-977
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- 1999
A Hardware Architecture for Retaining the Connectivity in Gray - Scale Image
그레이 레벨 연결성 복원 하드웨어 구조
Abstract
In this paper, we have proposed the hardware architecture which implements the algorithm for retaining the connectivity which prevents disconnecting in the gray-scale image thinning To perform the image thinning in a real time which find a skeleton in image, it is necessary to examine the connectivity of the skeleton in a real time. The proposed architecture finds the connectivity number in the 4-clock period. The architecture is consists of three blocks, PS(Parallel to Serial) Converter and State Generator and Ridge Checker. The PS Converter changes the 3
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